カテゴリ別記事インデックス https://msyksphinz.github.io/github_pages , English Version https://fpgadevdiary.hatenadiary.com/

FPGA開発日記 カテゴリ別インデックス



MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication

HAIR: Halving the Area of the Integer Register File with Odd/Even Banking

Cache Refill/Access Decoupling for Vector Machines

Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture

Decoupled vector architectures

Bingo Spatial Data Prefetcher

Data Cache Prefetching Using a Global History Buffer

Merging Similar Patterns for Hardware Prefetching

Spatial Memory Streaming

Efficiently Prefetching Complex Address Patterns (VLDP)

Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters

A Pluggable Vector Unit for RISC-V Vector Extension

キャッシュの置換アルゴリズム (RRIP)

Complexity-Effective Superscalar Processors

Fetch Directed Prefetching

Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra

RISC-V ベクトルプロセッサの実装論文Vitruvius+

Alpha EV8の分岐予測機


Alpha 21264

RISC-V ベクトル命令の自作CPUへの実装