自作CPUでのBit-manipulation拡張の実装検討 (デコーダの追加)

Bit-manipulationを自作CPUに実装してみたいので、まずはデコード情報を入力している。 以下のようなJSONを入力して、デコードを追加している。

[
    {
        "name":"add.uw r[11:7],r[19:15],r[24:20]",
        "length":"32", "xlen":["32", "64"],
        "field": ["00001", "00", "XXXXX", "XXXXX", "000", "XXXXX", "01110", "11"],
        "inst_cat": [["inst_cat", "arith"]], "isa_ext": "b",
        "reg": [["rd", "rs1", "rs2"]],
        "alu_ctrl":[["op", "unsignd_add_32"]]
    },
    {
        "name":"andn r[11:7],r[19:15],r[24:20]",
        "length":"32", "xlen":["32", "64"],
        "field": ["01000", "00", "XXXXX", "XXXXX", "XXX", "XXXXX", "00101", "11"],
        "inst_cat": [["inst_cat", "arith"]], "isa_ext": "b",
        "reg": [["rd", "rs1", "rs2"]],
        "alu_ctrl":[["op", "and_inv"]]
    },
/* ... 途中省略 ... */

生成されたデコード情報は以下のようになる：

package decoder_alu_ctrl_pkg;
  typedef enum logic [6: 0] {
    OP__ = 0,
    OP_SIGN_LUI = 1,
    OP_SIGN_AUIPC = 2,
    OP_SIGN_ADD = 3,
    OP_SIGN_SUB = 4,
    OP_SIGN_ADD_32 = 5,
/* ... 途中省略 ... */
    OP_UNSIGND_ADD_32 = 31,
    OP_AND_INV = 32,
    OP_CARRY_LESS_MUL = 33,
    OP_CARRY_LESS_MULH = 34,
    OP_CARRY_LESS_MULR = 35,
    OP_CLZ = 36,
    OP_CLZW = 37,
    OP_CPOP = 38,
    OP_CPOPW = 39,
    OP_CTZ = 40,
    OP_CTZW = 41,
    OP_SIGNED_MAX = 42,
    OP_UNSIGNED_MAX = 43,
    OP_SIGNED_MIN = 44,
    OP_UNSIGNED_MIN = 45,
    OP_BITWISE_OR = 46,
    OP_INVERTED_OR = 47,
    OP_BYTE_REVERSE = 48,
    OP_ROTATE_LEFT = 49,
    OP_ROTATE_LEFT_WORD = 50,
    OP_ROTATE_RIGHT = 51,
    OP_ROTATE_RIGHT_32 = 52,
    OP_BIT_CLEAR = 53,
    OP_BIT_EXTRACT = 54,
    OP_BIT_INVERT = 55,
    OP_BIT_SET = 56,
    OP_SIGN_EXTEND_8 = 57,
    OP_SIGN_EXTEND_16 = 58,
    OP_SIGNED_SH1ADD = 59,
    OP_UNSIGNED_SH1ADD_32 = 60,
    OP_SIGNED_SH2ADD = 61,
    OP_UNSIGNED_SH2ADD_32 = 62,
    OP_SIGNED_SH3ADD = 63,
    OP_UNSIGNED_SH3ADD_32 = 64,
    OP_UNSIGNED_SHIFT_LEFT_32 = 65,
    OP_XNOR = 66,
    OP_ZERO_EXTEND_16 = 67
  } op_t;