Vitis-HLSのフローにClangが組み込まれているということで、もう少し細かく挙動を確認したい。まず、元になるC++のソースコードがどのように変更されていくのかを確認する。
HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/autopilot.flow.log
Execute ap_eval exec -ignorestderr /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/../../llvm/hls-build/bin/clang hls_example.cpp -foptimization-record-file=/home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/clang.hls_example.cpp.diag.yml -mllvm -pass-remarks-missed=reflow|pasta|unroll -mllvm -pass-remarks=reflow|pasta|unroll|inline -fno-limit-debug-info -gcc-toolchain /home/msyksphinz/work3/Xilinx/Vitis_HLS/2020.2/tps/lnx64/gcc-6.2.0 -fhls -fno-exceptions -E -fno-math-errno -c -emit-llvm -mllvm -disable-llvm-optzns -Werror=implicit-function-declaration -Werror=implicit-hls-streams -Werror=return-type -Wpragmas -Wunused-parameter -fno-threadsafe-statics -fno-use-cxa-atexit -std=gnu++14 -target fpga64-xilinx-linux-gnu -fno-threadsafe-statics -fno-use-cxa-atexit -I /home/msyksphinz/work3/Xilinx/Vitis_HLS/2020.2/common/technology/autopilot/39 -D__VITIS_HLS__ -DAESL_SYN -D__SYNTHESIS__ -D__HLS_SYN__ -I /home/msyksphinz/work3/Xilinx/Vitis_HLS/2020.2/common/technology/autopilot -I /home/msyksphinz/work3/Xilinx/Vitis_HLS/2020.2/common/technology/autopilot/ap_sysc -include etc/autopilot_ssdm_op.h -D__DSP48E1__ -o /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp > /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/clang.hls_example.cpp.out.log 2> /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/clang.hls_example.cpp.err.log
ふーむ、まずはclangでマクロを処理しているらしい。入力と出力は以下だ。
- 入力:
hls_example.cpp
- 出力:
proj/solution1/.autopilot/db/hls_example.pp.0.cpp
これはマクロを引き剥がしているようだ。
# 22 "hls_example.cpp" 2 constexpr size_t N = 50; using namespace std; __attribute__((sdx_kernel("example", 0))) void example(int a[N], int b[N]) {_ssdm_SpecArrayDimSize(a, 50);_ssdm_SpecArrayDimSize(b, 50); #pragma HLS TOP name=example # 27 "hls_example.cpp" #pragma HLS INTERFACE m_axi port = a depth = N #pragma HLS INTERFACE m_axi port = b depth = N int buff[N]; VITIS_LOOP_31_1: for (size_t i = 0; i < N; ++i) { #pragma HLS PIPELINE II = 1 buff[i] = a[i]; buff[i] = buff[i] + 100; b[i] = buff[i]; } }
次に、clang-tidyというツールを実行している。これは何だろうと思ったが、どうやらLintチェッカーの類らしい。
INFO-FLOW: exec /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/../../llvm/hls-build/bin/clang-tidy -header-filter=.* --checks=-*,xilinx-systemc-detector -import-directive=/home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/.systemc_flag -fix-errors /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp -- -std=gnu++14 -target fpga -fhls -ferror-limit=0 Command clang_tidy done; 6.88 sec. INFO-FLOW: Running: clang-tidy CDT preprocess 39 Execute clang_tidy xilinx-directive2pragma /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp std=gnu++14 -target fpga -directive=/home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/all.directive.json INFO-FLOW: exec /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/../../llvm/hls-build/bin/clang-tidy -header-filter=.* --checks=-*,xilinx-directive2pragma -import-directive=/home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/all.directive.json -fix-errors /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp -- -std=gnu++14 -target fpga -fhls -ferror-limit=0 Command clang_tidy done; 7.8 sec. Execute clang_tidy xilinx-constantarray-param,xilinx-remove-assert /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp std=gnu++14 -target fpga INFO-FLOW: exec /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/../../llvm/hls-build/bin/clang-tidy -header-filter=.* --checks=-*,xilinx-constantarray-param,xilinx-remove-assert -fix-errors /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp -- -std=gnu++14 -target fpga -fhls -ferror-limit=0
次に、xilinx-dataflow-lawyer
というツールが実行されている。入力は先ほどのマクロを剥がしたC++ファイルで、出力はおそらくyaml
ファイルかな?
Execute ap_eval exec -ignorestderr /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/../../llvm/hls-build/bin/xilinx-dataflow-lawyer -export-fixes=/home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/xilinx-dataflow-lawyer.hls_example.pp.0.cpp.diag.yml /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp -- -std=gnu++14 -target fpga -fhls -ferror-limit=0 -fstrict-dataflow > /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/xilinx-dataflow-lawyer.hls_example.pp.0.cpp.out.log 2> /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/xilinx-dataflow-lawyer.hls_example.pp.0.cpp.err.log
このツール自体はLLVMのサブセットとして実装されているようだ。しかし途中のファイルが消されているのでどのようなファイルが入力されているのか分からない。
USAGE: xilinx-dataflow-lawyer [options] <source0> [... <sourceN>] OPTIONS: Generic Options: -help - Display available options (-help-hidden for more) -version - Display the version of this program tool-template options: -enable-fixes - Enable FixIt. -export-fixes=<filename> - YAML file to store suggested diagnostics in. -extra-arg=<string> - Additional argument to append to the compiler command line -extra-arg-before=<string> - Additional argument to prepend to the compiler command line -p=<string> - Build path
LLVM (http://llvm.org/): LLVM version 7.0.0svn DEBUG build with assertions. Default target: x86_64-unknown-linux-gnu Host CPU: skylake
xilinx-dataflow-lawyer.hls_example.pp.0.cpp.diag.yml
の中身が見たいのだがなあ?
ここまで来て、やっと-emit-llvm
によってBitCodeを生成している。
/home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/../../llvm/hls-build/bin/clang -foptimization-record-file=/home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/clang.hls_example.pp.0.cpp.diag.yml -mllvm -pass-remarks-missed=reflow|pasta|unroll -mllvm -pass-remarks=reflow|pasta|unroll|inline -fno-limit-debug-info -fhls -flto -fno-exceptions -Wno-error=c++11-narrowing /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.pp.0.cpp -fno-math-errno -c -emit-llvm -mllvm -disable-llvm-optzns -Werror=implicit-function-declaration -Werror=implicit-hls-streams -Werror=return-type -Wpragmas -Wunused-parameter -fno-threadsafe-statics -fno-use-cxa-atexit -std=gnu++14 -target fpga64-xilinx-linux-gnu -D__VITIS_HLS__ -DAESL_SYN -D__SYNTHESIS__ -D__HLS_SYN__ -I /home/msyksphinz/work3/Xilinx/Vitis_HLS/2020.2/common/technology/autopilot -I /home/msyksphinz/work3/Xilinx/Vitis_HLS/2020.2/common/technology/autopilot/ap_sysc -include etc/autopilot_ssdm_op.h -D__DSP48E1__ -g -o /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/hls_example.bc > /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/clang.hls_example.pp.0.cpp.out.log 2> /home/msyksphinz/work3/work/llvm/HLS/vitis_hls_examples/override_llvm_flow_demo/proj/solution1/.autopilot/db/clang.hls_example.pp.0.cpp.err.log Command ap_eval done; 6.89 sec.