Chipyardではいくつかのコンフィグレーションが用意されており、欲しい構成に応じてかなり柔軟にVerilogを生成することができる。どのようなコンフィグレーションが生成できるかについては、generators/chipyard/src/main/scala/config/に定義が置かれている。
cd generators/chipyard/src/main/scala/config grep class -R | grep "extends Config"
ArianeConfigs.scala:11:class ArianeConfig extends Config( ArianeConfigs.scala:28:class dmiArianeConfig extends Config( TutorialConfigs.scala:20:class TutorialStarterConfig extends Config( TutorialConfigs.scala:60:class TutorialMMIOConfig extends Config( TutorialConfigs.scala:88:class TutorialSha3Config extends Config( TutorialConfigs.scala:114:class TutorialSha3BlackBoxConfig extends Config( TracegenConfigs.scala:6:class TraceGenConfig extends Config( TracegenConfigs.scala:14:class NonBlockingTraceGenConfig extends Config( TracegenConfigs.scala:22:class BoomTraceGenConfig extends Config( TracegenConfigs.scala:31:class NonBlockingTraceGenL2Config extends Config( TracegenConfigs.scala:40:class NonBlockingTraceGenL2RingConfig extends Config( HeteroConfigs.scala:9:class LargeBoomAndRocketConfig extends Config( HeteroConfigs.scala:31:class HwachaLargeBoomAndHwachaRocketConfig extends Config( HeteroConfigs.scala:54:class DualLargeBoomAndRocketConfig extends Config( HeteroConfigs.scala:77:class LargeBoomAndHwachaRocketConfig extends Config( HeteroConfigs.scala:103:class LargeBoomAndRV32RocketConfig extends Config( HeteroConfigs.scala:127:class DualLargeBoomAndDualRocketConfig extends Config( HeteroConfigs.scala:149:class LargeBoomAndRocketWithControlCoreConfig extends Config( RocketConfigs.scala:9:class RocketConfig extends Config( RocketConfigs.scala:27:class HwachaRocketConfig extends Config( RocketConfigs.scala:47:class GemminiRocketConfig extends Config( RocketConfigs.scala:67:class RoccRocketConfig extends Config( RocketConfigs.scala:87:class jtagRocketConfig extends Config( RocketConfigs.scala:108:class dmiRocketConfig extends Config( RocketConfigs.scala:127:class GCDTLRocketConfig extends Config( RocketConfigs.scala:148:class GCDAXI4BlackBoxRocketConfig extends Config( RocketConfigs.scala:168:class LargeSPIFlashROMRocketConfig extends Config( RocketConfigs.scala:188:class SmallSPIFlashRocketConfig extends Config( RocketConfigs.scala:208:class SimAXIRocketConfig extends Config( RocketConfigs.scala:226:class SimBlockDeviceRocketConfig extends Config( RocketConfigs.scala:246:class BlockDeviceModelRocketConfig extends Config( RocketConfigs.scala:267:class GPIORocketConfig extends Config( RocketConfigs.scala:288:class QuadRocketConfig extends Config( RocketConfigs.scala:306:class RV32RocketConfig extends Config( RocketConfigs.scala:324:class GB1MemoryRocketConfig extends Config( RocketConfigs.scala:344:class Sha3RocketConfig extends Config( RocketConfigs.scala:365:class InitZeroRocketConfig extends Config( RocketConfigs.scala:385:class LoopbackNICRocketConfig extends Config( RocketConfigs.scala:406:class L1ScratchpadSmallRocketConfig extends Config( RocketConfigs.scala:427:class MbusScratchpadRocketConfig extends Config( RocketConfigs.scala:448:class RingSystemBusRocketConfig extends Config( RocketConfigs.scala:468:class StreamingPassthroughRocketConfig extends Config( RocketConfigs.scala:488:class StreamingFIRRocketConfig extends Config ( RocketConfigs.scala:508:class SmallNVDLARocketConfig extends Config( RocketConfigs.scala:527:class LargeNVDLARocketConfig extends Config( BoomConfigs.scala:9:class SmallBoomConfig extends Config( BoomConfigs.scala:28:class MediumBoomConfig extends Config( BoomConfigs.scala:47:class LargeBoomConfig extends Config( BoomConfigs.scala:66:class MegaBoomConfig extends Config( BoomConfigs.scala:85:class GigaBoomConfig extends Config( BoomConfigs.scala:104:class TeraBoomConfig extends Config( BoomConfigs.scala:124:class StrangeBoomConfig extends Config( BoomConfigs.scala:144:class DualSmallBoomConfig extends Config( BoomConfigs.scala:163:class SmallRV32BoomConfig extends Config( BoomConfigs.scala:184:class HwachaLargeBoomConfig extends Config( BoomConfigs.scala:204:class LoopbackNICLargeBoomConfig extends Config( BoomConfigs.scala:225:class DromajoBoomConfig extends Config(
ここで気になっているのは、BOOMとRocketのヘテロ環境が生成できるという構成であるLargeBoomAndRocketConfigとか、LargeBoomAndRocketWithControlCoreConfigだ。
これ以外にも、なんとNVDLAを埋め込んだ構成も生成することができる。これは面白い。
class SmallNVDLARocketConfig extends Config( new chipyard.iobinders.WithUARTAdapter ++ new chipyard.iobinders.WithTieOffInterrupts ++ new chipyard.iobinders.WithBlackBoxSimMem ++ new chipyard.iobinders.WithTiedOffDebug ++ new chipyard.iobinders.WithSimSerial ++ new testchipip.WithTSI ++ new chipyard.config.WithBootROM ++ new chipyard.config.WithUART ++ new chipyard.config.WithL2TLBs(1024) ++ new nvidia.blocks.dla.WithNVDLA("small") ++ // add a small NVDLA new freechips.rocketchip.subsystem.WithNoMMIOPort ++ new freechips.rocketchip.subsystem.WithNoSlavePort ++ new freechips.rocketchip.subsystem.WithInclusiveCache ++ new freechips.rocketchip.subsystem.WithNExtTopInterrupts(0) ++ new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new freechips.rocketchip.subsystem.WithCoherentBusTopology ++ new freechips.rocketchip.system.BaseConfig) class LargeNVDLARocketConfig extends Config( new chipyard.iobinders.WithUARTAdapter ++ new chipyard.iobinders.WithTieOffInterrupts ++ new chipyard.iobinders.WithBlackBoxSimMem ++ new chipyard.iobinders.WithTiedOffDebug ++ new chipyard.iobinders.WithSimSerial ++ new testchipip.WithTSI ++ new chipyard.config.WithBootROM ++ new chipyard.config.WithUART ++ new chipyard.config.WithL2TLBs(1024) ++ new nvidia.blocks.dla.WithNVDLA("large", true) ++ // add a large NVDLA with synth. rams new freechips.rocketchip.subsystem.WithNoMMIOPort ++ new freechips.rocketchip.subsystem.WithNoSlavePort ++ new freechips.rocketchip.subsystem.WithInclusiveCache ++ new freechips.rocketchip.subsystem.WithNExtTopInterrupts(0) ++ new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new freechips.rocketchip.subsystem.WithCoherentBusTopology ++ new freechips.rocketchip.system.BaseConfig)
NVDLAの構成についてはwithNVDLAで指定するらしい。
generators/nvdla/src/main/scala/ConfigFragments.scala
/** * Config fragment to add a NVDLA to the SoC. * Supports "small" and "large" configs only. * Can enable synth. RAMs instead of default FPGA RAMs. */ class WithNVDLA(config: String, synthRAMs: Boolean = false) extends Config((site, here, up) => { case NVDLAKey => Some(NVDLAParams(config = config, raddress = 0x10040000L, synthRAMs = synthRAMs)) case NVDLAFrontBusExtraBuffers => 0 })
以下のコマンドでVerilogを生成できる。
$ make CONFIG=SmallNVDLARocketConfig debug -j4 $ make CONFIG=LargeNVDLARocketConfig debug -j4
以下のコマンドでシミュレーションを実行してみた。
./simulator-chipyard-SmallNVDLARocketConfig-debug \ --vcd dhrystone.nvdla_rocket.vcd \ --verbose $RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/dhrystone.riscv 2>&1 | tee dhrystone.vdla_rocket.log
一応NVDLAが組み込まれてシミュレーションが動いた。ただしNVDLAを触るテストパタンは作れていないので、インスタンス化されているのを確認しただけだ。
