前回のRocket Chipの面積比較に続いて、BOOMでも同様のことを実施した。
BOOMはVersion 1とVersion 2があり、それぞれでVerilogを生成してVivadoで合成してみる。
まだ集計できていないが、だいたいの面積の概要は以下のようになっている。BOOM v1の方が少し大きいかなあ。階層構成が違うので少しわかりにくい。
- BOOM v1
| RocketTile | RocketTile | 115065 | 110560 | 4478 | 27 | 43418 | 9 | 8 | 40 | | core | BoomCore | 108816 | 104369 | 4422 | 25 | 38958 | 0 | 0 | 40 | | dcache | NonBlockingDCache_dcache | 2723 | 2674 | 48 | 1 | 1460 | 5 | 4 | 0 | | dcacheArb | HellaCacheArbiter | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | | frontend | Frontend_frontend | 3002 | 2993 | 8 | 1 | 2526 | 4 | 4 | 0 | | ptwOpt | PTW | 524 | 524 | 0 | 0 | 472 | 0 | 0 | 0 |
- BOOM v2
+----------------------------------------------+------------------------------------+------------+------------+---------+------+-------+--------+--------+--------------+ | Instance | Module | Total LUTs | Logic LUTs | LUTRAMs | SRLs | FFs | RAMB36 | RAMB18 | DSP48 Blocks | +----------------------------------------------+------------------------------------+------------+------------+---------+------+-------+--------+--------+--------------+ | (Top) | (top) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tileList_0 | BOOMTile | 113074 | 99582 | 13470 | 22 | 32276 | 0 | 0 | 40 | | PTW_1 | PTW | 286 | 286 | 0 | 0 | 471 | 0 | 0 | 0 | | core | BOOMCore | 93773 | 91919 | 1834 | 20 | 26971 | 0 | 0 | 40 | | dcArb | HellaCacheArbiter | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 0 | | dc_shim | DCacheShim | 554 | 554 | 0 | 0 | 737 | 0 | 0 | 0 | | dcache | HellaCache | 9987 | 4086 | 5900 | 1 | 2120 | 0 | 0 | 0 | | icache | Frontend | 8473 | 2736 | 5736 | 1 | 1975 | 0 | 0 | 0 | | uncore | Uncore | 196636 | 91747 | 104888 | 1 | 5443 | 128 | 0 | 0 | | (uncore) | Uncore | 6 | 6 | 0 | 0 | 7 | 0 | 0 | 0 | | DebugModule_1 | DebugModule | 300 | 236 | 64 | 0 | 138 | 0 | 0 | 0 | | LevelGateway_1_1 | LevelGateway | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | | LevelGateway_2 | LevelGateway_0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | | PLIC_1 | PLIC | 38 | 38 | 0 | 0 | 42 | 0 | 0 | 0 | | PRCI_1 | PRCI | 205 | 205 | 0 | 0 | 210 | 0 | 0 | 0 | | ROMSlave_1 | ROMSlave | 169 | 169 | 0 | 0 | 14 | 0 | 0 | 0 | | TileLinkRecursiveInterconnect_2 | TileLinkRecursiveInterconnect | 52 | 52 | 0 | 0 | 7 | 0 | 0 | 0 | | outmemsys | OuterMemorySystem | 195866 | 91041 | 104824 | 1 | 5023 | 128 | 0 | 0 |
BOOM v2の合成結果の階層表示。
